High-tech

Due Diligence: Ignios

By Bipin Parmar

Ignios is a post Chilli R1 Oxford, UK based IP (intellectual property) company founded in 2003 to address the emerging market of software programmable multicore SoC (systems on a chip) designs. The two co-founders Mark Lippett and Dan Chester had encountered many of the challenges of multicore designs in previous careers at Madge Networks, Texas Instruments and Chameleon Systems.

Management team
Rick Clucas, the current CEO of Ignios, joined the management team in June 2004. Rick has extensive startup and processor-based chip design management experience from his early days at ARC International where he was the CTO and one of the original founders. During this time, Rick pioneered and participated in the ongoing development of the world’s first configurable microprocessor IP core and many multicore design projects. His entrepreneurial skills were further honed by a brief stint at the investment bank Beeson Gregory, now merged with Evolution, and various non-executive positions at other startups.

Mark Lippett, CTO and co-founder of Ignios, comes with over 12 years experience of multicore and multiprocessor designs, embedded software development and architecture design gained in both systems equipment and chip-level design. His design management experience was gained at companies like Madge Networks and during four years running a design consultancy.

Dan Chester, VP of business development and co-founder of Ignios, has extensive experience in the semiconductor and EDA (electronic design automation) industries from his previous roles of application development and technical marketing positions at Altera and Synopsys. He also worked on multicore designs at Chameleon Systems.

The company currently employs nine people, with the majority of them engaged in r & d activity.

The motivation for starting Ignios came with a vision that the new emerging market for multicore chip designs could offer a vast improvement in chip performance. However multicore chips create a number of opportunities and challenges that have to be overcome for users to get access to the full benefit offered by these complex chips. Ignios licenses IP to companies developing multicore chips to improve the usability and efficiency of their products.

Vital statistics
Ignios was founded with a small amount of Chilli S2 and S3 seed capital from friends and family. This allowed sufficient time to build an effective prototype to demonstrate to potential investors and partners. Ignios managed to raise a Chilli R1 of $3.8m in January 2004 from Alice Labs, a Milan, Italy and Tel Aviv, Israel based early stage fund, as well as the investment fund of British Technology Group, which specialises in licensing and patent portfolio management. The company wants to bring in some additional investors when it raises a Chilli R2 round.

Ignios value proposition
Most car drivers know that pushing the engine speed doesn’t necessarily relate to a proportionate increase in car speed, and can result in poor fuel economy. Clever use of gears and levers can achieve the same speed with better fuel efficiency, without damaging the engine. In processor design, the higher the clock frequency (engine speed) is increased, the worse the power efficiency becomes, ultimately limiting the performance as the heat threatens to damage the chip.

In processor design, the answer to this speed/efficiency problem lies in separating out all the tasks to be performed so that they can be run on multiple processing resources on the same chip. Each one of these resources can be a different type of processor or, increasingly, a piece of hardwired logic. The resultant system can do the same amount (or more) work at a lower speed than a single processor running much faster. Each of the processing resources in a chip is referred to as a ‘core’, with the resultant architecture classified as being ‘multicore’.

Already the previous use of single-processor chips is hitting the limits, with Intel announcing that by 2006, the vast majority of its server and mobile processors will be dual-core designs. Other semiconductor vendors have similar programmes in the pipeline with further multicore design announcement from the likes of Freescale (ex Motorola), Broadcom and AMD. Cisco has announced a chip with 192 cores.

Although multicore designs offer a degree of magnitude improvement in performance, the biggest challenge is to make effective use of this added performance, managing which processor core is executing what task and how the results are stored and passed on. In current systems, this management functionality is handled by dedicated software that is referred to as the operating system (OS). The current software-only approach to OS comes with a big penalty; it can take a lot of memory and can become a bottleneck in the system – increasingly so as more processors have to be managed. The problem is more critical in embedded products, such as cellphones and PDAs, which have limited memory and battery life.

Ignios: a different approach to multicore
To make full use of the facilities, flexibility and performance offered by multicore designs requires a new architectural approach. However, given the amount of legacy understanding in the chip and software industries, any solution must work with existing processor designs and software-development know-how. Solutions have to trade-off between power, performance, memory size and complexity.

Ignios’ first product, SystemWeaver, launched at Electronica 2004 in Munich, takes care of the trade-offs in a cost efficient and elegant manner.

SystemWeaver, utilising technology in two patents filed by Ignios, unifies all the various processing resources in a multicore chip design beneath a single software interface (API) that makes programming multicore chips simpler and produces more efficient results. This approach is independent of the underlying types of processor resource and will work with most of the existing processor cores on the market, such as ARM, MIPS, ARC and various other DSP and specialist IP.

SystemWeaver consists of an API and an IP core that the company expects to require 70K to 80K ‘gates’ of chip area (about 0.25mm2), which in today’s context of large multicore design, is quite small. The solution may also require the addition of around 2K gates for some types of specialist processing resource. The first version of SystemWeaver can handle up to 255 processors, which is appropriate for the market at this stage.

Customers and partners
The company will license the SystemWeaver API and IP core to companies developing multicore chips. These might be fabless semiconductor companies or IDMs. Many of the benefits of SystemWeaver-enabled chips are actually realised by the end-users of the chips. The company says that it has gained traction for SystemWeaver with a number of chip companies who appreciate the challenges that their end-customers are facing in trying to use multicore chips.

The company has worked with EDA companies and is starting to work with OS vendors interested in enhancing their software to take advantage of SystemWeaver-enabled chips. According to Rick Clucas, “Mentor Graphics has been very supportive in terms of support and flexibility of pricing, which is necessary for a start up in its early stages”. Rick has been critical of vendors which are inflexible with price demands, which can eat up a substantial amount of its initial S3, R1 funding. He says this is specially the case with head-hunters and some recruitment companies.

The Chilli perspective
Markets: Intel has already announced that ramping up the clock frequency doesn’t result in equivalent performance and will result in power dissipation problems. So the market is ready to deploy multicore designs and solutions. Ignios is well positioned to take advantage of multicore designs and increasing use of platform-based designs on pSoC (programmable SoC) and pASoC (programmable, application specific platforms on SoC) aimed at embedded systems such as network systems, graphics, digital consumer and storage applications.

Pricing model: The challenge for all platform based offerings – which consist of hardware, software and tools – is the legacy and the way hardware and software IP is sold. Hardware IP usually commands a license fee and some royalties in terms of the number of units produced. Software tools are sold in terms of number of developers and users working on a specific project. This creates a dilemma for the vendor as a switch to one or other business model creates a different pricing model.

Some vendors have overcome this by estimating the number of developers involved in the project at the outset and burying the tools price in the overall license fees package. However, experience gained by the Ignios management team in this sector will become very useful, especially now that free evaluation licenses are no longer popular amongst IP vendors. Ignios is focusing on the hardware IP model today, which is potentially the most lucrative but also a tougher sell due to the typical levels of license fee required.

Sales channels: Initially the company plans to sell direct to large semiconductor and systems vendors. After it has raised a Chilli R2 it will be in a good position to develop extensive reseller and partner networks with other IP companies, systems level design tools vendors and EDA vendors.

Competitors: Current offerings on the market which address similar problems are available from existing OS players such as OSE, Nucleus, Green Hills and Wind River. The problem with software-only RTOS (real time operating systems) solutions is that they take a lot of memory space and tend to consume a lot of clock cycles, which hogs the system. This is a big problem in embedded design where space and performance is limited by power considerations.

Ignios has been clever in its architecture design and commercial strategy, in not competing directly with the current approach. Instead of competing with the established players, it has developed a complementary solution that can be used with legacy approaches to both software (RTOS) and hardware (processors). The SystemWeaver API can be used either directly by software developers or can be buried beneath an existing RTOS. The hardware architecture also supports legacy multicore designs.

Potential competition can come from existing processor vendors, who want to remain in control of the overall design flows, and be selective in who it wants to partner with. However, the need to create fast, complex multicore designs that utilise a variety of different processing resources from different core and tools vendors positions Ignios in a neutral and open position.

Summary
Ignios has hit its main milestone, namely getting its first product ready. It has a well-experienced management team that has the relevant domain expertise in the field of multicore designs. It is engaging with prospective semiconductor customers and has also started entertaining the key systems level EDA and processor IP vendors who are key players in the multicore designs. Ignios is hitting the market window at the right time, with the recent heightened activity on multicore designs shown by announcements from major semiconductor vendors.

The next milestone for Ignios is to strike up some key pilot customers, where the initial product offering can be fine tuned. It is in a good position as the skill-sets and market for system-level, multicore design in Europe is three to four years ahead of other regions in the world.

Once Ignios has achieved it next key milestone, it will be in a good position to be considered as part of an overall solution, and hence likely to be target for acquisition by systems tools vendors or possibly a semiconductor company looking to restrict access to this technology for their own products only.

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© Chilli Publishing Ltd 2004

08NOV2004