Semiconductor IP industry - ready for restructuring?

Part four: some possible solutions

By Bipin Parmar

Given the challenges outlined in parts one, two and three of this series, just what are the possible solutions?

Fundamental IP (assign it to a third party aggregator)

A polite way of exiting the IP business and returning to the body shop model with a drastically reduced headcount and cost base. The investment you had made in protecting your fundamental IP (FIP) via some key patent applications can be used as a leverage to plan a successful exit for your company. FIP which has broad application use (i.e. power saving, optics, semiconductor architecture, lithography, chip design, wireless, broadband, etc), can be sold/licensed more cost effectively by a larger organisation, which has the critical mass or collection of FIP. As it stands, your limited number of patents cannot justify the support cost of a whole organisation, but larger FIP companies can spread this cost over literally hundreds of patents in their portfolio. Larger FIP companies also try to scale this business and attract the largest number of potential licensees possible.

There are some specialist FIP companies, who specialise in licensing a wide range of patents from a pool of third party, acquired IP patents and IP. The SIP vendor will have to clearly demonstrate the ROI (return on investment) on their patent before a FIP vendor will take it on board. After all, if they are struggling to sell their own IP, then the FIP vendor will face the same challenge. Sadly, very few SIP vendors have spent the effort and resources to file key fundamental patents, and have very little in terms of protection, other than some RTL code. Any IP that requires huge support before it can be used cannot take this route, as licensing companies tend to be pretty independent and they don't like carrying the additional cost burden of customer support.

EDA vendors come to the rescue

For semiconductor IP, a good target for an aggregator are the EDA vendors, who need to provide a rich IP library which is not only compatible with their design tools, but has been verified and tested. The EDA vendor can use the collection of SIP as a leverage to defend their existing installed base or as a weapon to dislodge an incumbent player from a design location. From a financial viewpoint, a larger pool of SIP offers a more even revenue spread, than the lumpiness that can occur when offering a limited SIP portfolio.

Systems IP or platform IP

Rather than offer black box IP which cannot meet all the customer requirements, IP vendors can start to offer a complete platform design, which includes the application software, as well as software development tools. Examples of complete system designs are Bluetooth, 3G phones, wireless LAN, H26L and security systems, which contain the fundamental IP at its heart plus other third party IP. This can remove most of the pain currently suffered by the potential customer and produce higher investment returns, if the whole transition is managed effectively. In other words, the SIP vendor has to put himself in the customer's shoes and integrate all the third party tools and IP, as well as verify and test the complete system. This requires a different skills set and resources to a pure-play point IP company. Managing, motivating and supporting a third party relationship is one of the most challenging and complex management tasks for a platform IP vendor. Many platform IP vendors have become unstuck because they failed to manage the third party relationship rather than master the system knowledge. Given limited resources, the vendor will have to choose or bet as to which sector they will target first - this is a far higher risk then first meets the eye, as betting on the wrong horse can destroy the whole company. Vendors such as ParthusCeva, TTPCom and Imagination Technologies have successfully crossed the bridge to being platform IP companies.

The next challenge is for the platform IP companies to manage their cost structure in order to reach a cash positive position in a reasonable amount of time - recession or no recession as traditional VC funding in this area has almost dried up completely due to many failures in this sector.

Some existing investors have openly suggested that if the platform IP company is going to provide 80-90% of the system solution, then the additional investment required to become a fabless chip company is relatively low (the current market assumption is that you will burn up to $20m to deliver platform IP and $25m to deliver fully functional, pre-production chip samples from a fabless company).

Platform IP that delivers 80-90% of the system solution requires in-depth system knowledge and experience, which is currently OK, due to the cut backs in the OEM industry, but may not be the case when markets pick up again. Systems engineers like to work in large groups, where they can share their combined knowledge. At the end of the day, platform IP vendors will have to clearly demonstrate their systems in real silicon and the effort and costs required to do a demonstration chip is as large as doing a real SoC design. The only saving of the previous route is the lack of logistics and financial resources required to do full fabless. A suitable bridge towards this eventual fabless path is a model that supports a foundry with IP integration and full chip design service dedicated to a particular foundry.

Fabless model

If you are going to expend the effort to demonstrate your platform IP in real ASSP silicon, as opposed to simple code programmed in a FPGA, then the only hurdles stopping you from supplying the OEMs are financial, rather than systems know-how or engineering. Additional investments will have to be made in sales, applications, support systems and logistics. VCs would look at such a scenario fairly positively, as this is a well-proven model, although not all fabless companies have had successful exits. The additional leverage that can be brought to bear by the financial leverage can make a huge difference to the life and death of the company.

For example in the SIP model, a 10c unit royalty for a production quantity of one million units only generates a revenue of $100k, as opposed to a $5m revenue, from a $5 chip or $20m from a $20 chipset. The fundamentals are all different. $20m revenue with decent gross margin has a higher probability of absorbing the additional $5m to $10m cost base for the fabless route than $1m in SIP revenue. The second benefit is the that whole valuation is different - a fabless company generating $30-40m in revenue is going to have a far higher valuation than one struggling to reach $10m with very little marginal difference in costs. A fabless company should be able to generate a revenue of $250K to $300K per head, even if it needs two or three times the number of heads of a SIP company which is currently struggling to generate $150K a head. Once the company has passed its third round of funding, it will face a new set of challenges in maintaining the low overheads of a nimble start-up using external foundries compared to a large integrated device manufacturer (IDM) with larger overhead. It is very easy to step in the negative margin category, if there are suddenly new entrants in the market, which can result in the margin dropping by 90 to 200% overnight.

Going fabless has many other advantages that can be leveraged via additional VC funding. There is a larger pool of available management talent from the chip industry, so it is easier to recruit from existing semiconductor companies, whether it is an executive team, engineering, support or sales staff.

But going fabless has its own set of risks. If a fabless company gets too close to a market that is the turf of a large semiconductor player, then the chances of getting squeezed or squashed out of existence are very high. Market timing is one of the most important, if not the most important factor in determining the success ratio of fabless start-ups. A fabless company has to make its mark in a small niche, before it can risk waking up the giants who have a vast amount of financial as well as manpower resources. On the other hand occupying a small expanding niche at the right time could provide a much needed exit route. Large companies very often acquire small fabless companies as a defensive measure against their competitors, as well as gaining a time to market advantage. If the fabless guys have taken all the risks, and successfully demonstrated a sustainable business advantage, then they become very tasty morsels for the large semiconductor companies and this is reflected in the prices paid on the fundamental multiples. There are a whole set of management challenges that have to be addressed for a fabless company which has its origin in the SIP industry. Choosing the wrong niche could be devastating.

Conclusion

Investors and SIP vendor executives have three different directions which they can take, namely:

a. Pass on the patents to a patent pool, downsize and become a body shop

b. Become a platform IP company with system expertise

c. Go the fabless route

Sitting on the fence is not a wise option, as VC money is very scarce, and companies who cannot demonstrate a clear path to sustainability will not get a second bite at the cherry. We recognise that although the choices faced are simple, the process of making the change and executing it are far more complex. The interests of founders, investors and other stakeholders have to be balanced against the risks of outright failure.

In future issues of The Chilli, there will be special reports on the fabless semiconductor industry, systems houses and more. If you have not already registered to receive regular alerts, please take a moment to fill in your registration details - it will take less than two minutes.

Comments on this story? Send an email to Bipin@theChilli.com

© Chilli Publishing Ltd 2003

28FEB2003